Phase locked loop sweep frequency synthesizer
US4931749A · kind A · utility
8Cited by
3References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 17, 1988 |
| Grant date | Jun 5, 1990 |
| Priority date | — |
| Expiry date | Oct 17, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03C3/0908
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer is provided in which the output is a truly continuous sweep of frequency, not a staircase of spot frequencies. A programmable frequency divider PD is connected to the output of a voltage-controlled oscillator (VCO) to divide the VCO output by a variable integer N. At each VCO output cycle, the integer N is incremented (or decremented). The output of a phase comparator PC, which compares the divider output with a fixed reference frequency, is connected via an integrator (10) to the VCO frequency control input (2). A constant phase error produces a ramp rise of VCO frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.