Patent · US Expired

Programmable tiles

US4931946A · kind A · utility

50Cited by
10References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 10, 1988
Grant dateJun 5, 1990
Priority date
Expiry dateMar 10, 2008

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/17712
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Disclosed is a set of functional components (tiles), consisting in part of subgate elements, which, by their design, facilitate the creation of dense integrated circuits, without forfeiting the capability of modifying the functionality of individual tiles by late mask programming techniques. Overall densities approach those obtained with hand-crafted, custom designs can be obtained in part because such components are designed to be tiled throughout a storage logic array, permitting the creation of orthogonal logic gates as well as individual gates (and more complex functions) the functionality of which is distributed horizontally, vertically and even in a zigzag fashion. Moreover, the transition time from prototype to high volume manufacturing is reduced significantly due to the ease with which even complex functions can be repaired and enhanced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.