Clamped sense amplifier
US4935649A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 11, 1988 |
| Grant date | Jun 19, 1990 |
| Priority date | — |
| Expiry date | Jul 11, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01707
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to an improved CMOS clamped sense amplifier having an input terminal adapted to receive the signal to be sensed. The signal passes through a CMOS input clamp circuit which includes a pair of complementary MOS transistors having their drains coupled together and to the input terminal, and their sources adapted to be coupled respectively to opposite power supply terminals. The input signal also passes to a voltage gain stage coupled to the input terminal and having an output terminal for providing the amplified output signal from the sense amplifier. To achieve the enhanced signal throughput speed, a resistance means is employed, coupled between the gates of the transistors of the CMOS input clamp circuit and the input terminal. Although this resistance reduces the clamping effectiveness of the clamping circuit, it still decreases the overall throughput time through the sense amplifier, thus increasing switching speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.