Sampling-holding circuit with high sampling frequency
US4937472A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 2, 1987 |
| Grant date | Jun 26, 1990 |
| Priority date | — |
| Expiry date | Oct 2, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/024
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ultra-fast sample-and-hold circuit for the processing of analog signals comprises a diodes bridge: an input signal VE is applied to the input point and copied at the output point; the output signal is memorized in a capacitance. At the midpoints of the bridge, two current sources are applied. The voltages at the midpoints are servo-linked, in the hold mode, to the output voltage by means of a voltage follower and diodes mounted diagonally across the bridge, the two switches of the current sources being controlled by a signal clock signal. It is applied to signal processing chains in instrumentation, radar and telecommunications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.