Switching state retention circuit
US4937473A · kind A · utility
8Cited by
10References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 4, 1988 |
| Grant date | Jun 26, 1990 |
| Priority date | — |
| Expiry date | Oct 4, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356104
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data storage latch which permits forming a feedback loop for storage and permits storing data signals in an open loop configuration using logic circuit elements based on cross-coupled transistor loads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.