Method of making direct bonded wafers having a void free interface
US4939101A · kind A · utility
51Cited by
6References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 6, 1988 |
| Grant date | Jul 3, 1990 |
| Priority date | — |
| Expiry date | Sep 6, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S228/903
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Wafers which are direct bonded to each other in accordance with prior art processes suffer from voids at their bonded interface. Annealing such composite structures at high temperature and high pressure (for silicon wafers preferably about 1,100.degree. C. and 15,000 psi) eliminates all voids which are not a result of the presence of a particle on one of the wafers at the time of mating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.