Reenergizing circuit for a MOS technology integrated circuit
US4939385A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 27, 1988 |
| Grant date | Jul 3, 1990 |
| Priority date | — |
| Expiry date | Dec 27, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/3565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a reenergizing circuit designed to start a MOS technology integrated circuit. It comprises a power supply terminal, a ground terminal and an output terminal, a first capacitor which is connected between the ground terminal and a circuit node; the capacitor has a charge which is controlled by means of a first p-type transistor which is connected between the power terminal and the circuit node. It further comprises an inverter gate which has a modifiable threshold voltage whose input terminal is connected to the circuit node, an inverter connected between the output terminal of the inverter gate and the output terminal, a current source which is connected in series to a divider circuit controlling the first p-type transistor and a circuit (C) having a transfer function V.sub.S =f (V.sub.E) of the inverter type, said circuit (C) being connected between the output terminal of the inverter gate and the current source in order to control the operation of the current source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.