Semiconductor integrated circuit device with MISFETS using two drain impurities
US4939386A · kind A · utility
22Cited by
6References
44Claims
0Family size
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Key dates
| Filing date | Nov 4, 1987 |
| Grant date | Jul 3, 1990 |
| Priority date | — |
| Expiry date | Nov 4, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
Abstract
Disclosed in an N-type MISFET having the LDD structure in which the short-channel effect is reduced by employing arsenic, which has a smaller diffusion coefficient value than that of phosphorus, to form low- and high-impurity concentration regions which constitute in combination source and drain regions of the MISFET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.