Chopper stabilized delta-sigma analog-to-digital converter
US4939516A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 13, 1988 |
| Grant date | Jul 3, 1990 |
| Priority date | — |
| Expiry date | Jun 13, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/438
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A chopper stabilized analog-to-digital converter includes an analog modulator (10) and a digital filter (12). The analog modulator (10) is comprised of two integrators (20) and (22). The first integrator (20) is a chopper stabilized integrator which is comprised of a chopper stabilized differential amplifier (32) and a capacitively switched input. The amplifier (32) is operable to receive a chopping frequency F.sub.CH that is one-half the sampling frequency F.sub.S and synchronized thereto. The amplifier (32) is operable to modulate the noise up to the chopping frequency F.sub.CH, which frequency is in the rejection portion of the filter response for the digital filter (12), thus rejecting 1/f noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.