Circuit for synchronizing transitions of bits in a digital code
US4939517A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1988 |
| Grant date | Jul 3, 1990 |
| Priority date | — |
| Expiry date | Feb 12, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/14
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic circuit contains a main stage (10 and 12) that produces a digital code consisting of a plurality of bits (B.sub.1 -B.sub.M-1) that make binary transitions as a function of an input parameter (V.sub.I). A synchronization stage (14 and 16) synchronizes transitions of bits (B.sub.0 -B.sub.K-1) in one part of the code with corresponding transitions of bits (B.sub.K -B.sub.M-1) in another part. When the input parameter is in transition regions where bits in the first-mentioned part of the code could go to wrong values, the synchronization stage suitably replaces the values of bits in the first part with information based on bits in the other part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.