Program controlled bus arbitration for a distributed array processing system
US4941086A · kind A · utility
17Cited by
6References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 2, 1984 |
| Grant date | Jul 10, 1990 |
| Priority date | — |
| Expiry date | Feb 2, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A distributed array processing system includes a bus divided into two portions or segments by a switch. One segment is connected to a processor and to a bus arbiter for controlling use of the bus. The bus arbiter provides one source of bus grant signals. A control register provides a second source of bus grant signals and additional signals for disabling the arbiter and actuating the switch. The control register is software controlled, i.e., it is loadable with data or control signals, under program control, to control use of the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.