Parallel processor system having control processor and array control apparatus for selectively activating different processors
US4943912A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 13, 1987 |
| Grant date | Jul 24, 1990 |
| Priority date | — |
| Expiry date | Oct 13, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8015
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parallel processor system comprises a main storage, a processor array control apparatus, a control processor which requests the processor array control apparatus to execute the processing in accordance with a procedure start instruction, and a plurality of processor elements each containing a local memory. In response to a designation from the control processor, the processor array control apparatus transfers the program from the main storage to the local memories in all of the processor elements before they are driven. The processor array control apparatus then controls the conditions of the processor elements and drives those processor elements which are capable of processing the procedure in accordance with the procedure start instruction from the control processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.