Apparatus for processing images having desired gray levels including a three-dimensional frame memory
US4943937A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 1988 |
| Grant date | Jul 24, 1990 |
| Priority date | — |
| Expiry date | Mar 25, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An image processing apparatus includes a 3-dimensional frame memory. The frame memory is made up of a plurality of memory planes which are logically stacked in a depth direction (Z direction) and are accessed independently. The apparatus also includes a memory controller which can access a plurality of memory areas of the frame memory. These memory areas can be located in any desired position in the depth direction, and can each have a desired number of bits in the depth direction, regardless of a bit length of image buses contained in the apparatus and connected to an image processor, and the memory controller. The image processor receives data through the image buses, logically operates the data and outputs it to the image buses. When in read mode, the memory controller converts the data read out from the memory areas of the frame memory into the type of data which can be transferred through the image buses. When in write mode, the memory controller converts the data received from the image buses into data which can be written into the memory areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.