Integratable circuit configuration for reverse current reduction in an inversely operated transistor

US4945444A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Frank-Lothar Schwertlein · Hersbruck, DE
• Michael Lenz · Zorneding, DE

Key dates

• Filing date: Dec 18, 1989
• Grant date: Jul 31, 1990
• Expiry date: Dec 18, 2009

Classification

• Technology area (CPC G): Physics
• CPC primary: G05F1/569
• WIPO field: Control
• WIPO sector: Instruments

Abstract

An integratable circuit configuration includes a first transistor of one conduction type having an emitter being acted upon by a first potential, a collector being acted upon by a second potential, a base, a base-to-collector path and a base-to-emitter path. A resistor is connected in parallel with the base-to-emitter path of the first transistor. A second transistor of the other conduction type is connected to the base of the first transistor for triggering. A diode may be connected in parallel with the base-to-collector path of the first transistor. The diode conducts in inverse operation for reverse current reduction during inverse operation of the first transistor. A third transistor may be connected to the first transistor instead of the diode and fourth and further transistors may also be connected to the first transistor.