Synchronizing circuit for offset quaternary phase shift keying
US4949357A · kind A · utility
7Cited by
8References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 14, 1989 |
| Grant date | Aug 14, 1990 |
| Priority date | — |
| Expiry date | Mar 14, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0067
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A synchronizing circuit for offset quaternary phase shift keying, comprises: a four-phase demodulator 10; a processing module (11, 12); and a phase error calculating circuit (15) followed by a phase correcting circuit (16) which delivers a phase error correction signal. The invention is applicable to telecommunications by microwave beams.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.