Logic circuits for forming VLSI logic networks
US4950927A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 1989 |
| Grant date | Aug 21, 1990 |
| Priority date | — |
| Expiry date | Sep 5, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/088
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A DTT type basic logic circuit exhibiting improved immunity to noise and including input diodes for receiving input signals A, B, . . .; an input transistor the emitter of which receives an additional input signal X and the base of which is connected to the anodes of the input diodes; and an output inverter transistor disposed so that the signal at the output thereof represents the logic function X(AB . . .). From this circuit, a family of logic circuits suitable for realizing very-large-scale-integration logic networks in a master slice can be developed. The master slice comprises general-purpose cells in which pre-diffused semiconductor elements can be interconnected to form the desired circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.