Nibble-mode dram solid state storage device
US4951246A · kind A · utility
20Cited by
17References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 8, 1989 |
| Grant date | Aug 21, 1990 |
| Priority date | — |
| Expiry date | Aug 8, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1039
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nibble-mode DRAM solid state storage device is organized into a plurality of sections each including a plurality of groups, each including a plurality of ranks of DRAM memory chips. A pipeline data path is provided into and out of each group and nibble-mode access is facilitated by simultaneous pipelining of data into and out of the memory while memory reference operations are accomplished.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.