Sputtered metallic silicide gate for GaAs integrated circuits
US4954852A · kind A · utility
8Cited by
0References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 24, 1987 |
| Grant date | Sep 4, 1990 |
| Priority date | — |
| Expiry date | Dec 24, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/64
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and resulting circuit structure (10) are disclosed for sputtering metallic silicide gates (18) on gallium arsenide integrated circuit structures. Silicon and metallic layers (14,15,14') are sputtered onto a gallium arsenide substrate (12) for stable high-temperature gate metallizations on VLSI structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.