MIS type static memory cell and memory and storage process
US4954989A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 1989 |
| Grant date | Sep 4, 1990 |
| Priority date | — |
| Expiry date | Apr 10, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static memory cell of the metal-insulator-semiconductor type, which can be used in the microelectronics field for producing random access memories for storing binary information. This MIS type memory cell is a random access static memory cell known under the abbreviation SRAM. A bistable flip-flop is formed by a MIS transistor and a parasitic bipolar transistor. The source and drain of the MIS transistor respectively formed by constituting the emitter and collector of the bipolar transistor. The region of the channel of the MIS transistor located between the source and drain serves as the base for the bipolar transistor. The base is completely isolated from the outside of the memory cell. The gate electrode of the MIS transistor is electrically isolated from the region of the channel. There is an addressing circuit for the flip-flop for storing binary information in the form of the absence or presence of current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.