Compression loaded semiconductor device
US4956696A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 1989 |
| Grant date | Sep 11, 1990 |
| Priority date | — |
| Expiry date | Aug 24, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1305
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A compression loaded semiconductor device package (40) in accordance with the invention includes a cylindrical semiconductor device (54) having a first region (66) on a first face, a control region (68) on the first face having a central portion (70) and a plurality of projections (72) extending radially from the central portion with the radial projections being symmetrically disposed around the periphery of the first face and a second region (74) on a second face with the second face being opposed to the first face; an electrically conductive contract (48) having an external control terminal (88), an annulus (84) electrically connected to the external control terminal, a plurality of projections (82) electrically connected to the annulus, projecting radially inward and a center (80) electrically connected to the radially inward projections and to the control region; and first and second annular insulators (112 and 114) each insulator having a plurality of faces, the upper cover being bonded to a first face (116) of the first insulator, a second face of the first insulator being bonded to a first attachment ring (122) with the first attachment ring being bonded to the annulus, the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.