Data processing system with model for status accumulating operation by simulating sequence of arithmetic steps performed by arithmetic processor
US4956767A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 23, 1988 |
| Grant date | Sep 11, 1990 |
| Priority date | — |
| Expiry date | Feb 23, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method accumulates the status of the execution of an arithmetic operation by an arithmetic processor having hardware elements for performing the steps of the operation, where each step is based on one or more operands and produces an intermediate or final result and possibly produces a corresponding status indicator. The method includes simulating the hardware elements in a model that performs simulated steps analogous to the steps performed by the hardware elements, each simulated step resulting in an intermediate or final status result; and while the arithmetic processor executes the arithmetic operation, applying each status indicator to the point in the model that corresponds to the point in the arithmetic processor where the result corresponding to the status indicator is applied, whereby the final result of the operation of the model will represent the accumulated status of the execution of the arithmetic operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.