Queued serial peripheral interface for use in a data processing system
US4958277A · kind A · utility
72Cited by
17References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 21, 1989 |
| Grant date | Sep 18, 1990 |
| Priority date | — |
| Expiry date | Apr 21, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/423
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A serial peripheral interface achieves compatibility with devices having previous such interfaces while singificantly reducing the amount of intervention required on the part of the controlling data processing device. Many serial transfers are written to a memory by the controlling device together with command and control information. The interface then executes the stored, or queued, transfers autonomously. Features such as programmable transfer length, programmable chip selects, an alterable queue pointer, and others contribute to the flexibility and usefulness of the interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.