Output buffer for reducing switching induced noise
US4961010A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 19, 1989 |
| Grant date | Oct 2, 1990 |
| Priority date | — |
| Expiry date | May 19, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output buffer for reducing switching induced noise in high speed integrated circuit devices incorporates a relatively small current carrying capacity secondary pulldown transistor element with the current path first and second terminal leads coupled in parallel with the current path first and second terminal leads of the primary pulldown transistor element. A separate pulldown delay resistance element of selected value is coupled in series between the control terminal leads of the secondary and primary pulldown transistor elements. The secondary pulldown transistor element control terminal lead is coupled in the output buffer to receive a signal propagating through the output buffer before the primary pulldown transistor element control terminal lead. A relatively small discharge current is therefore limited from the output before turn on of the relatively large discharge current of the primary pulldown transistor element. The separate pulldown delay resistance element delays turn on of the primary pulldown transistor element a specified time delay after turn on of the secondary pulldown transistor element during transition from high to low potential at the output. As result gro…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.