Method for producing semiconductor integrated circuit device
US4962052A · kind A · utility
32Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 7, 1990 |
| Grant date | Oct 9, 1990 |
| Priority date | — |
| Expiry date | Feb 7, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/401
Abstract
A method for producing a memory LSI having in its peripheral circuitry an MISFET of LDD structure and a vertical type bipolar transistor is disclosed. More particularly, an impurity for forming a low impurity concentration region of the said MISFET of LDD structure is introduced sideways of an emitter-base junction of the bipolar transistor. By the introduction of the said impurity, an effective impurity concentration near the base surface is reduced and the cut-off frequency of the bipolar transistor is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.