Offset compensation circuit
US4965867A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Aug 22, 1988 |
| Grant date | Oct 23, 1990 |
| Priority date | — |
| Expiry date | Aug 22, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An offset compensation circuit for compensating a DC offset which occurs in a circuit line including an A/D converter or an A/D and D/A converter in which not only the polarity bit of digital data but also information concerning the amplitude of an analog input signal are applied to an integrator to precisely compensate an offset voltage in a circuit line. The level of a proper offset compensation voltage is provided even when an input analog signal such as a music signal is absent, and when an A/D and D/A converter is provided which can perform both A/D conversion and D/A conversion the DC offset can be precisely compensated shortly after the change of the mode from D/A conversion to A/D conversion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.