Patent · US Expired

Frequency multiplier with programmable order of multiplication

US4967160A · kind A · utility

177Cited by
3References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 22, 1989
Grant dateOct 30, 1990
Priority date
Expiry dateJun 22, 2009

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03B19/00
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

This frequency multiplier circuit with variable multiplication order is of the type comprising a comb generator that receives, at input, a signal at the base frequency to be multiplied, and gives, at output, a composite pulse signal having a plurality of harmonic lines of the base frequency, said comb generator being followed by a pass-band filter that can be tuned selectively to one of these harmonic lines. The comb generator is formed by logic means having two complemented outputs, a synchronous input, the actuation of which controls the changing of these outputs from one logic state to the other, and a asynchronous input, the actuation of which controls, independently of the state of the synchronous input, the changing of these outputs to the states complementary to those generated by the actuation of the synchronous input. The base frequency signal is biased beforehand so that its excursion takes place around the transition voltage controlling the change from one logic state to the other, said signal being applied to the synchronous input of the logic means, and a first output of these means is connected to asynchronous input and the second output delivers said composite pulse …

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.