Pipelined vector processor for executing recursive instructions
US4967350A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1988 |
| Grant date | Oct 30, 1990 |
| Priority date | — |
| Expiry date | Mar 30, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3834
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A vector computer includes memory 11 for storing vector data, and arithmetic unit 12 for sequentially reading out the vector data from memory 11, performing vector processing based on a pipeline system, and storing an operation result in memory 11. The vector computer further includes read/write controller 13 for storing white addresses of the memory at which results of operations being performed in stages of a pipeline are to be written, comparing the write addresses with a read address generated by arithmetic unit 12, and when at least one of the write addresses coincides with the read address, detecting that data designated by the read address is being operated in any stage of the pipeline, i.e., is not determined yet, thereby inhibiting reading of the data designated by the read address from memory 11.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.