Phase locked loop having parallel comparators
US4970473A · kind A · utility
4Cited by
3References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 31, 1989 |
| Grant date | Nov 13, 1990 |
| Priority date | — |
| Expiry date | May 31, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/087
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for high-efficiency tuning of video frequencies comprises a closed control loop including a voltage controlled oscillator, a frequeny divider, a phase comparator, and a low-pass filter cascade interconnected via respective inputs and outputs, with the filter output connected to the oscillator input to form the loop. The circuit further comprises a second comparator connected in parallel to the phase comparator between the frequency divider output and the low-pass filter input to compare a reference frequency to a frequency from the divider when the values of each frequencies lie far apart.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.