Method of fabricating semiconductor device
US4971922A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 1989 |
| Grant date | Nov 20, 1990 |
| Priority date | — |
| Expiry date | May 30, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/106
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a MOS field effect semiconductor device having an LLD structure is described in which an insulating film is formed on a gate electrode and a layer of polycrystalline silicon, oxide, high melting point metal or a silicide of a high melting point metal is formed on a wafer and etched away by anisotropic RIE, except a portion thereof on a sidewall of the gate. With the resulting structure, degradation of the transconductance of the device due to injection of hot carriers is prevented. Also, the size of the device can be minimized without unduly increasing the resistances of the drain/source region, the gate electrode, and the contacts of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.