Noise reduction in CMOS driver using capacitor discharge to generate a control voltage
US4972101A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 1989 |
| Grant date | Nov 20, 1990 |
| Priority date | — |
| Expiry date | Sep 19, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/163
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pull-up or pull-down transistor in an output buffer or the like is controlled to limit dI/dt and thus reduce noise. This control employs a series transistor in the driver circuit which has a modulating voltage applied to its gate. This modulating voltage is generated in a circuit which uses precision-timed clocks as a reference so that variations in electrical parameters (process, temperature and power supply dependent) will not cause variation in circuit noise. A dummy driver circuit is used to discharge a capacitor at a rate dependent upon the modulating voltage, and the capacitor voltage is compared with a reference at a time determined by the precision clock. The result of the comparison is used to increment or decrement the modulating voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.