Multiplexed synchronous/asynchronous data bus
US4972432A · kind A · utility
25Cited by
7References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 27, 1989 |
| Grant date | Nov 20, 1990 |
| Priority date | — |
| Expiry date | Jan 27, 2009 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB21J9/04
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A multiplexed synchronous/asynchronous data bus is disclosed in which three bus lines are used to convey bidirectional synchronous data between at least two data devices at a relatively low data rate. Half duplex asynchronous data is applied at a higher data transfer rate to one of the three bus lines when another of the bus lines is held in a logic high state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.