Circuit for synchronizing an asynchronous input signal to a high frequency clock
US4973860A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 2, 1989 |
| Grant date | Nov 27, 1990 |
| Priority date | — |
| Expiry date | May 2, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/02
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit for synchronizing an asynchronous input signal with an internal time base clock operates at a high frequency. The circuit includes an input flip-flop that receives the input signal and an output flip-flop that provides an output signal that is synchronized with the internal time base clock. The input flip-flop and the output flip-flop are interconnected via logic circuitry so that any instability on the output of the input flip-flop caused by failure of the input signal to satisfy the setup and hold conditions of the input flip-flop are isolated from the output of the output flip-flop. The output of the output flip-flop is a stable signal that is synchronized with the internal time base clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.