Semiconductor integrated circuit device and method of manufacturing the same
US4974060A · kind A · utility
43Cited by
8References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 1, 1989 |
| Grant date | Nov 27, 1990 |
| Priority date | — |
| Expiry date | Feb 1, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/395
Abstract
A dynamic RAM having memory cells each being constructed of a MISFET and a capacitor element which are formed in the shape of a pillar on the domain of a semiconductor substrate where a bit line and a word line intersect. The transfer MISFET is formed at the lower part of the pillar-shaped memory cell, while the capacitor element is formed at the upper part thereof, and a plate electrode to which the reference potential of the capacitor element is applied is isolated from the semiconductor substrate, so that 1/2 V.sub.cc can be adopted as the reference potential of the capacitor element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.