Processor system including a paging processor for controlling paging between a main storage and an extended storage
US4974145A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Nov 30, 1988 |
| Grant date | Nov 27, 1990 |
| Priority date | — |
| Expiry date | Nov 30, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A vector processor having a scalar procesing unit, a vector processing unit, a main storage unit, an extended storage unit, a storage control unit, and a paging processor unit, in which the storage control unit address translation for an access request from the vector processing unit to the main storage unit and includes a circuit for storing a kind of an access request issued for each storage location of the main storage the paging processor unit includes a circuit operative in response to issuance of an access request for data in a logical address space not existing in the main storage unit for interrupting a vector access request related thereto from the vector processing unit, a circuit for releasing the interruption according to an instruction, a circuit for loading the main storage unit with requested data of a logical address space existing in the extended storage unit, and a circuit for detecting an area of the main storage having a lower access frequency so as to move data from the area into the extended storage unit. A microprogram is used to execute programming of an algorithm to achieve a data transfer between the main storage unit and the extended storage unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.