Exponential gain control for nonlinear analog-to-digital converter
US4975701A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 1989 |
| Grant date | Dec 4, 1990 |
| Priority date | — |
| Expiry date | Nov 20, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An exponential analog-to-digital converter comprises two gain stages, each of which includes a binary-weighted capacitor array. The capacitors are switched in succession to multiply the gain of a sampled analog input signal, while a counter counts down for each switching step from an initial setting of binary 111. When the gain signal has a value outside a predetermined reference voltage range, a 3-bit binary digital word representative of the analog input signal sample is registered in the counter. If the gain signal produced after all the capacitors have been switched in to provide the maximum gain does not fall outside the reference range, then the binary word stored in the counter for the sample of the analog signal is 000.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.