Interface circuit for data transmission between a microprocessor system and a time-division-multiplexed system
US4975911A · kind A · utility
1Cited by
2References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 22, 1989 |
| Grant date | Dec 4, 1990 |
| Priority date | — |
| Expiry date | Jun 22, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/047
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The circuit of the present invention provides a signal which allows data to be transferred between a first synchronous system to a second synchronous system. Where the first system is a Time-Division-Multiplexing (TDM) system and the second system is a Microprocessor system. The transfer is allowed after three or four memory cycles of the Microprocessor system after receiving the end of time slot signal. This invention requires that the Microprocessor system access the Time-Division-Multiplexed system as an Input/Output (I/O) device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.