Selective solder formation on printed circuit boards
US4978423A · kind A · utility
27Cited by
7References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 1988 |
| Grant date | Dec 18, 1990 |
| Priority date | — |
| Expiry date | Sep 26, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/043
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method of providing solder on selected portions of a printed circuit board. Solder is first electroplated over copper conductor patterns on the board by means of a first photoresist layer. After stripping the first photoresist, a second photoresist layer is laminated over the board and developed to expose selected portions of the solder. The exposed portions are selectively stripped. The copper exposed by the selective stripping is then subjected to a scrubbing while the photoresist protects the remaining solder, and the second photoresist is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.