Multiprocessor system
US4979096A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 1987 |
| Grant date | Dec 18, 1990 |
| Priority date | — |
| Expiry date | Feb 17, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiprocessor system includes processor units connected physically in one-dimensional fashion along a ring bus located at the node of each processor element and associated local memory, so that various system operating modes are possible. The ring bus is used for inter-processor data transfer, with the address and read/write signals to each local memory being supplied from the processor element (by the program). Sychronization between the data flow on the ring bus and the processor operation is made automatic by the innovated method of inter-processor connection, which includes flag latches in the ring bus, whereby the system accomplishes extremely high-speed processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.