Preparation of semiconductor devices
US4981814A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1989 |
| Grant date | Jan 1, 1991 |
| Priority date | — |
| Expiry date | Aug 3, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/902
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
It has been found that layers which include arsenic and/or zinc can have an adverse effect upon optoelectronic semiconductor devices such as lasers. This is reduced by treatments in which arsenic and zinc are excluded. Preferably the substrate is cooled from reaction temperature in the presence of a mixture of hydrogen and PH.sub.3 (replacing AsH.sub.3 and/or Zn(CH.sub.3).sub.2 used to grow the final layer). Alternatively, devices have a contact layer of heavily p-type gallium indium arsenide are improved by the deposition of a protective layer of indium phosphide. This layer is removed immediately before metalization. Even though the protective layer is not present in the final product it has a beneficial effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.