Automatic verification system for maintenance/diagnosis facility in computer system
US4984239A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jan 4, 1989 |
| Grant date | Jan 8, 1991 |
| Priority date | — |
| Expiry date | Jan 4, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2736
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An automatic verification system for a maintenance/diagnosis facility in a computer system comprising a host computer and a service processor for performing maintenace/diagnosis of the host computer. The host computer includes a fault detecting facility and the service processor includes a fault cause analyzing/processing facility and a fault cause analysis data storing file. The fault cause analyzing/processing facility automatically retrieves on a software basis the fault cause analysis data with high efficiency and accuracy to improve accuracy and efficiency of the test. Through a multi-run of a verification program and a random sequence test program by which a variety of instruction strings based on a random sequence are generated and executed, faults generated at sophisticated timings inherent to a computer using acceleration logic adapted for parallel execution of a plurality of instructions can be simulated to realize a wide range of operation of the fault detecting facility and a wide range of verification for the fault cause analyzing/processing facility. With the above construction, the automatic verification system can efficiently perform automatic verification for the f…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.