Multiprocessor task scheduling system
US4985831A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 1988 |
| Grant date | Jan 15, 1991 |
| Priority date | — |
| Expiry date | Oct 31, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4881
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A task status word (TSW) is created for each task indicating, the instant location of the task, its priority and a record of synchronizing signals. Task status words are accessible from an addressable memory section for delivery to a TSW register. From the TSW register, a selected TSW effects control functions to synchronize tasks in different processors or computational units as well as input-output processors. A physical memory manager locates TSWs in response to signals, then checks the location of the task and the nature of the signal to determine signal routing to a processor. If a task is not in a processor, an interrupt manager resolves priority and signal significance indicated by the TSW to determine an interrupt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.