Power supply switching circuit
US4988894A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 1989 |
| Grant date | Jan 29, 1991 |
| Priority date | — |
| Expiry date | Jun 14, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power supply switching circuit includes first to third MOS transistors (P1, P2 and P3) connected in series between a high-potential source and a standard-potential source. The circuit performs a switching operation using a standard-potential and at least one potential which is different from the standard-poential, and outputs plural power supply potentials. The third MOS transistor (P3) is inserted between the first and second MOS transistors (P1 and P2). The back gate of the third transistor (P3) is connected to an output terminal (OUT1) formed between the second transistor (P2) and the third transistor (P3) and prevents the formation of a current path via turned-off transistor (P1) due to the action of a parasitic diode in the first and second transistors caused by potential fluctuations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.