Patent · US Expired

Semiconductor integrated circuit device having multilayer power supply lines

US4989062A · kind A · utility

48Cited by
4References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 16, 1988
Grant dateJan 29, 1991
Priority date
Expiry dateJun 16, 2008

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor integrated circuit device having multilayer power supply lines includes a plurality of power supply lines formed on a semiconductor chip for supplying power to the cells. The power supply lines are constructed by the multilayer structure having three different layer levels. First-level (lower) and third-level (upper) power supply lines are arranged in parallel so as to overlap each other. Second-level (intermittent) power supply lines are arranged in parallel so as to extend in a direction perpendicular to the first-level and third-level power supply lines. The overlapping first and third power supply lines are set at different potentials.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.