Hybrid interconnection structure
US4989067A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 1989 |
| Grant date | Jan 29, 1991 |
| Priority date | — |
| Expiry date | Jul 3, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hybrid interconnection structure is disclosed having application to the fine pitch interconnection of delicate semiconductor chips. The invention entails the use of a beam lead interconnect in which patterned conductor runs are provided on the upper surface of a silicon chip. The conductor runs extend beyond the chip to form a paired set of beam leads. One set of beam leads makes contact with terminals on the upper surface of one chip and the other set of beam leads makes contact with terminals on the upper surface of another chip. The interconnect chip is set on a substrate common to the interconnected chips with its top surface slightly (normally less than 1-2 mils) above the top surfaces of the interconnected chips. This limits any downward deformation of the beam leads in the bonding process to insure reliability of the bond for fine pitch application. The invention has specific application to arrays of infrared detectors in which interconnections are provided between a delicate light sensing chip of mercury cadmium telluride or indium antimonide and more rugged readout integrated circuits, usually of silicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.