Technique for parallel synchronization
US4989131A · kind A · utility
71Cited by
15References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 26, 1988 |
| Grant date | Jan 29, 1991 |
| Priority date | — |
| Expiry date | Jul 26, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30087
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parallel synchronization technique utilizing a combining network in which two processors synchronize by having one processor suspend operation while the other processor becomes the agent for the one processor, while continuing to operate on its own behalf. This reduces the access requests and subsequent contention caused by multiple concurrent requests to a common variable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.