Fast gate and adder for microprocessor ALU
US4989174A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 27, 1988 |
| Grant date | Jan 29, 1991 |
| Priority date | — |
| Expiry date | Oct 27, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3876
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fast logic gate wherein the gate output assumes a first binary state when two or more of the gate inputs assume the same predetermined binary states and wherein the gate output assumes a second binary state otherwise. The delay in propagating the gate output based on a transition at a predetermined one of the gate inputs is relatively small. In a preferred application, the gate is utilized in a microprocessor ALU, more particularly, the portion of each adder bit which generates the carry output, and the predetermined gate input is the carry input of the adder bit. The microprocessor can therefore execute instructions which involve addition or subtraction operations, such as relatively addressing instructions, much more quickily.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.