Automatic verification of kernel circuitry based on analysis of memory accesses
US4989207A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 23, 1988 |
| Grant date | Jan 29, 1991 |
| Priority date | — |
| Expiry date | Nov 23, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2273
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for providing automatic verification of the kernel circuitry of a microprocessor-based system in which the microprocessor (.mu.P) include an instruction prefetch feature. During testing by memory emulation, the memory addresses accessed by the .mu.P are evaluated as to type of access, address and data size in accordance with a test program and a corresponding checking table to determine if such accesses are consistent with a funtional .mu.P of the same type. Other data structures such as flags and pointers are provided to enhance the verification operation and use of the checking table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.