Method and apparatus for demodulating a class of M-ary phase shift keyed (PSK) signals
US4989220A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 1989 |
| Grant date | Jan 29, 1991 |
| Priority date | — |
| Expiry date | Feb 28, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2331
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus for demodulating M-ary PSK signals of the type wherein the modulation is limited to phase transitions between adjacent phase states. The method is operative in a demodulator which comprises a phase splitter dividing a source signal into two paths with a preselected phase relationship among phases, one of the phases being delayed by nominally one bit period, a mixer or multiplier receiving as one input a representation of the delayed-phase component and as a second input a representation of the other phase component. A signal is filtered by a lowpass filter and provided to at least one corresponding two-level comparator, each of which produces a digital output. Digital logic circuitry responds to the digital outputs of each of the comparators to map the digital outputs into a single digital bit stream of ones and zeros.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.