Patent · US Expired

Vertically interconnected integrated circuit chip system

US4991000A · kind A · utility

67Cited by
5References
13Claims
0Family size

Inventors

Key dates

Filing dateAug 31, 1989
Grant dateFeb 5, 1991
Priority date
Expiry dateAug 31, 2009

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/1627
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A high density IC layout is achieved by providing conductive feedthroughs through an IC chip directly to input/output locations within the circuitry, inward from the periphery of the chip or alternately at the periphery of the chip. The chip can thus be mounted to a substrate face up, allowing for visual inspection and simplified mounting techniques. To provide a high density 3-D stack, substrates with chips mounted thereon are stacked together, with substrate feedthroughs connecting to selected chip feedthrough via the substrate routing, and successive layers electrically connected by contact springs. Chips mounted on a single substrate can also be used in a 2-D configuration, without substrate feedthroughs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.