N.times.M round robin order arbitrating switching matrix system
US4991084A · kind A · utility
17Cited by
10References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 5, 1988 |
| Grant date | Feb 5, 1991 |
| Priority date | — |
| Expiry date | Feb 5, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An N.times.M matrix adapted to couple N inputs from N processor to M basic storage modules is disclosed. The system includes arbitrators and gating means for each output responsive to request signals for simultaneously coupling data from a plurality of processors to requested basic storage modules under arbitrator control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.